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Tri path Technol og y, I nc. - Techni cal I nformati on
TAA4100A FOUR CHANNEL CLASS-T DIGITAL AUDIO AMPLIFIER USING DIGITAL POWER PROCESSING (DPP T M ) TECHNOLOGY
Technical Information Revision 1.0 - November 2005
GENERAL DESCRIPTION
The TAA4100A is a four-channel Audio Amplifier that uses Tripath's proprietary Digital Power Processing (DPPTM) technology. Class-T amplifiers offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers. The TAA4100A has been designed specifically for automotive head unit applications and is configured with four bridged outputs operating on a single 10-26V supply.
APPLICATIONS FEATURES
Automotive Head Units Automotive Amplifiers DVD Receivers Multimedia Speaker Systems
BENEFITS
4-channel (400W) solution - with integrated FETs - in a single 32-pin SSIP package High fidelity, high efficiency Class-T Low external component count Single-supply operation
C lass- T architec ture Four H-Bridge outputs "Audiophile" Sound Quality High Efficiency High Power @25.0V 100Wsat. sq. wave @ 4 80W @ 4, 10% THD+N "Audiophile" Quality Sound 0.01% THD+N @ 40W 4 0.01% IHF-IM @ 1W 4 High Efficiency 88% @ 100W 4 Two ohm stable for automotive battery voltage range AM "Low EMI" mode Pop-Free startup and shutdown High Dynamic Range Mute and Stand-By function Automatic DC Offset Trim Clip Detection Output Protection Modes: Output Short to VPP and Ground Output Short across Load Load Dump Protection Over-/Under-Voltage Protection Over-current Protection Over-temperature Protection Fortuitous Open Ground
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Absolute Maximum Ratings (Note 1)
SYMBOL VPP VPPMAX VPPAM VINRANGE TSTORE IR Tj PD ESD ESD Supply Voltage Peak Supply Voltage (t<50ms) Supply Voltage in AM Mode (Note 2) Voltage Range for Input Section Pins (Note 3) Inputs (Pins 1-4, 6-9) Storage Temperature Range Repetitive Peak Output Current Maximum Junction Temperature Total Power Dissipation (Tcase = 70C) ESD Susceptibility - Human Body Model (Note 4) ESD Susceptibility - Machine Model (Note 5) PARAMETER Value 33 60 18 -0.5 to 5.5 -55 to +150 14 150 80 2k 200 UNITS V V V V C A C W V V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. See the table below for Operating Conditions. Note 2: Supply voltage is limited in AM Mode due to additional power dissipation of output stage when operating in Class B mode. Please note that the TAA4100A is still fully protected from load dump transients in AM Mode. Note 3: The input section pins (pins 1-9, 11,12) should not be connected to voltages over 5.5V with respect to pin 10 (AGND). Please note that pins 5, 11, and 12 are outputs and can be damaged if a voltage is forced externally. Note 4: Human body model, 100pF discharged through a 1.5K resistor. Note 5: Machine model, 220pF - 240pF discharged through all pins.
Operating Conditions (Note 6)
SYMBOL VPP VPPAM TA Supply Voltage (Note 6) Supply Voltage for AM Mode (Note 7) Operating Free Air Temperature Range PARAMETER MIN. 10 10 -40 TYP. 14.4 14.4 25 MAX. 26 16 85 UNITS V V C
Note 6: Recommended Operating Conditions indicate conditions for which the device is functional. See Electrical Characteristics for guaranteed specific performance limits. Note 7: Supply voltage is limited in AM Mode due to additional power dissipation of output stage when operating in Class B mode, as opposed to Switching Mode.
Thermal Characteristics
SYMBOL JC JA PARAMETER Junction-to-case Thermal Resistance Junction-to-ambient Thermal Resistance (still air) Value 1.0 20 UNITS C/W C/W
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Electrical Characteristics (Note 8)
TA = 25C. Unless otherwise noted, the supply voltage is VPP = 14.4V. See Application/Test Circuit.
SYMBOL RIN IQ ISTBY VIL VIH VIL VIH VOS VOH VOL VIH VIL IAM PARAMETER Input Impedance Quiescent Current Stand-By Current Stand-By On Threshold Voltage Stand-By Off Threshold Voltage Mute-On Threshold Voltage Mute-Off Threshold Voltage Output Offset Voltage No load VSLEEPB < 0.15V SLEEPB Low (amp off) SLEEPB High (amp on) MUTEB pin Low MUTEB pin High (Mute Off) DC trim active 3.5 1 2.3 1 1 2.3 +3 +25 2.3 1 Conditions MIN. 43 TYP. 50 220 100 MAX. 57 250 200 0.5 UNITS k mA uA V V V V mV V V V V A
Fault Reporting Logic Output High Voltage Open Drain Output Fault Reporting Logic Output Low Voltage AM Mode On Threshold Voltage AM Mode Off Threshold Voltage AM Mode Pin Input Current RFAULT = 51K AM pin High AM pin Low
Note 8: Minimum and maximum limits are guaranteed but may not be 100% tested.
Performance Characteristics (Note 8)
TA = 25C. Unless otherwise noted, the supply voltage is VPP = 14.4V, RL = 4. Measurement Bandwidth = 20kHz. See Application/Test Circuit.
SYMBOL POUT PARAMETER Output Power (Continuous power/ channel) CONDITIONS VPP=25V sat. sq. wave VPP=25V THD+N=10% VPP=25V THD+N=1% VPP=14.4V sat. sq. wave, RL = 2 VPP=14.4V THD+N=10%, RL = 2 VPP=14.4V THD+N=1%, RL = 2 VPP=14.4V sat. sq. wave VPP=14.4V THD+N=10% VPP=14.4V THD+N=1% 28.7 POUT = 10W/Channel, RL = 4 BW = 22Hz-20kHz(AES17) 19kHz, 20kHz, 1:1 (IHF) POUT = 1W/Channel A-Weighted, POUT = 100W/Channel, VPP=25V VPP=14.4V, Ripple=200mV, f= 1kHz Vs=25.0V, 4 x 100W sat sq wave Po=1W, f = 1kHz Po=1W, f = 10kHz A-Weighted MIN. TYP. 105 80 65 62 45 36 40 28 22 29.7 0.01 0.01 100 60 88 80 65 180 220 MAX. UNITS W W W W W W W W W dB % % dB dB % dB dB V
AV THD + N IHF-IM SNR PSRR CS enOUT
Voltage Gain VOUT/VIN, RIN = 0 Total Harmonic Distortion Plus Noise IHF Intermodulation Distortion Signal-to-Noise Ratio Power Supply Rejection Ratio Power Efficiency Channel Separation Output Noise Voltage
30.7
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AM Mode (Note 9)
TA = 25C. Unless otherwise noted, the supply voltage is VPP = 14.4V, RL = 4. Measurement Bandwidth = 20kHz. See Application/Test Circuit.
.
SYMBOL IOCD THD+N SNR Pout CS en PARAMETER Over-current detect Total Harmonic Dist plus Noise Signal to Noise ratio Output Power (Note 7) Channel Separation Output Noise Voltage Po=0.5-5W per channel A-Weighted, Po=15W VPP=16V, THD+N=10% VPP=14.4V, THD+N=10% Po=1W, f=1kHz A-Weighted CONDITIONS MIN. 5.5 0.04 92.5 20 16 80 180 220 TYP. MAX. UNITS A % dB W W dB V
Note 9: The TAA4100A heat sinking in AM Mode must be increased (as compared to Class T mode) to sustain the typical output numbers. This is due to the lower efficiency of Class B output stage operation. Please note that the AM Mode operating supply range, due to this increased power dissipation, is 10V-16V.
TA = 25C. Unless otherwise noted, the supply voltage is VPP = 14.4V.
SYMBOL OVON OVOFF UVOFF UVON OTON OTOFF IOC VPMAX PARAMETER Over-voltage Threshold Over-voltage Reset Under-voltage Reset Under-voltage Threshold Over-Temperature Threshold Over-Temperature Reset Over-Current Detect Load Dump Voltage Withstand CONDITIONS Over-voltage turn on (amp muted) Over-voltage turn off (mute off) Under-voltage turn off (mute off) Under-voltage turn on (amp muted) Over-temperature turn on (amp muted) Over-temperature turn off (mute off) 1kHz single-shot ramp, VPP = 25V Test conditions, tr > 2.5ms, tpulse<50mS 7.8 150 120 10.5 60 MIN. 27.0 26.0 TYP. 30 28.0 9.5 8.1 160 130 12.5 10.0 8.6 170 140 MAX. 32.5 UNITS V V V V
C C
Protection Circuits (Note 8)
A V
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IN1 IN2 IN3 IN4 BIASCAP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 OUT4P VPP4 PGND OUT4N OUT3N VPP3 OUT3P FAULT OUT2P VPP2 OUT2N OUT1N PGND VPP1 OUT1P DCAP PGND SLEEPB AM OVRLDB MUTEB AGND1 5VGEN HMUTEB VPPA AGND2 CPUMP
TAA4100A Pinout
Note: The heat slug of the TAA4100A is connected to PGND.
32-pin SSIP Package (Top View)
25 26 27 28 29 30 31 32
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Pin Description
PIN
1 2 3 4 5 6
NAME/FUNCTION
IN1 IN2 IN3 IN4 BIASCAP SLEEPB
TYPE
INPUT INPUT INPUT INPUT INPUT (L)
DESCRIPTION
Channel 1 Input Channel 2 Input Channel 3 Input Channel 4 Input Internal reference bypass capacitor connection Logic input, ACTIVE LOW. Setting SLEEP to low puts the TAA4100A in sleep mode. This pin must be driven high via an external power supply or microcontroller for the TAA4100A to begin operation. Input range is 0 to 5V with 3.3V compliant inputs. Logic input, ACTIVE HIGH. Enables Analog Mode operation. Typically driven by an external power supply of microcontroller. Input range is 0 to 5V with 3.3V compliant inputs. Logic output, ACTIVE LOW. OVRLDB low indicates the input has overloaded the amplifier Logic Input, ACTIVE LOW. Setting MUTE to low puts the device in mute mode. Typically driven by external power supply or microcontroller. Input range is 0 to 5V with 3.3V compliant inputs. Analog ground On chip 5V regulator bypass capacitor connection Logic output, ACTIVE LOW. HMUTEB low indicates TAA4100A is in mute mode Positive power supply voltage connection Analog ground Charge pump output capacitor Positive Output Channel 4 Positive Supply Voltage Channel 4 Power Ground Negative Output Channel 4 Negative Output Channel 3 Positive Supply Voltage Channel 3 Positive Output Channel 3 Open Drain Logic Output, ACTIVE HIGH. FAULT high indicates fault condition. Positive Output Channel 2 Positive Supply Voltage Channel 2 Negative Output Channel 2 Negative Output Channel 1 Power Ground Positive Supply Voltage Channel 1 Positive Output Channel 1 External Charge Pump Circuit Output. DCAP is a free running 400kHz square wave between VDDA (pin 13) and AGND (pin 14) with a 14.4Vpp nominal amplitude. Power Ground
7 8 9
AM OVRLDB MUTEB
INPUT (L) OUTPUT (L) INPUT (L)
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
AGND1 5VGEN HMUTEB VPPA AGND2 CPUMP OUT4P VPP4 PGND OUT4N OUT3N VPP3 OUT3P FAULT OUT2P VPP2 OUT2N OUT1N PGND VPP1 OUT1P DCAP PGND
GND OUTPUT (L) POWER GND OUTPUT OUTPUT POWER GND OUTPUT OUTPUT POWER OUTPUT OUTPUT (L) OUTPUT POWER OUTPUT OUTPUT GND POWER OUTPUT OUTPUT GND
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TAA4100A Functional Block Diagram
VPP
Processing & Modulation
VREF
PGND VPP
PGND VPP
Processing & Modulation
VREF
PGND VPP
PGND VPP
Processing & Modulation
VREF
PGND VPP
PGND VPP
Processing & Modulation
VREF
PGND VPP
PGND
Charge Pump Supply Internal 5V Regulator
PROTECTION
Over-Current Over/Under-Voltage Over-Temperature
MODE CONTROL
Mute Standby AM Mode Clipping/Signal Overload Detection
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Application/Test Circuit
TAA4100A
VPP1 VPP (PIN 29) DO LO 10uH CO 0.47uF
30 OUT1P
CI 0.47uF + IN1 1 DO 50K V5
+
AGND
Processing & Modulation
PGND12 VPP1
PGND (PIN 28) VPP(PIN 29) DO LO 10uH CO 0.47uF
RZ 10, 2W CZ 0.22uF
CDO 0.01uF
RL
27 OUT1N
2.5V PGND12 BIASCAP 5 CB 0.1uF CI 0.47uF + IN2 2 VPP2
DO PGND (PIN 28) VPP (PIN 25) DO LO 10uH CO 0.47uF
24 OUT2P
DO 50K V5
+
AGND
Processing & Modulation
PGND12 VPP2
PGND (PIN 28) VPP(PIN 25) DO LO 10uH CO 0.47uF
RZ 10, 2W CZ 0.22uF
CDO 0.01uF
RL
26 OUT2N
VREGEXT PGND12
MUTEB 9
DO PGND (PIN 28) VPP (PIN 21) DO LO 10uH CO 0.47uF
VPP3
AGND
22 OUT3P
DO 50K V5
CI 0.47uF + IN3 3
+
AGND
Processing & Modulation
PGND34 VPP3
PGND (PIN 18) VPP(PIN 21) DO LO 10uH CO 0.47uF
RZ 10, 2W CZ 0.22uF
CDO 0.01uF
RL
20 OUT3N
DO PGND34 VPP4
PGND (PIN 18) VPP (PIN 17) DO LO 10uH CO 0.47uF
16 OUT4P
CI 0.47uF + IN4 4 DO 50K V5
+
AGND
Processing & Modulation
PGND34 VPP4
PGND (PIN 18) VPP(PIN 17) DO LO 10uH CO 0.47uF
RZ 10, 2W CZ 0.22uF
CDO 0.01uF
RL
19 OUT4N
DO VREGEXT
SLEEPB 6
PGND34
PGND (PIN 18)
VREGEXT RFAULT 51K CCP 0.1uF DCP VPP DCP
12 HMUTEB 23 FAULT 31 DCAP 29 VPP1 25 VPP2 28 PGND 21 VPP3 17 VPP4 18 PGND 32 PGND CBR 0.1uF CBR 0.1uF CCP 0.1uF
AM 7 AGND OVRLDB 8 5VGEN 11
CPUMP
CS + 3.3uF CCP + VPP 3.3uF
CS 0.1uF CCP 0.1uF CS 0.1uF
AGND 10 CPUMP 15 VPPA 13 AGND 14
CBR 0.1uF
VPP
+
CBR 1000uF PGND VPP
CBR 0.1uF
+
CBR 1000uF PGND
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External Components Description (Refer to the Application/Test Circuit)
Components CI CS CBR Description AC input coupling capacitor which, in conjunction with RIN, forms a highpass filter at fC = 1 (2RNI CI ) where RIN is typically 50k. Supply decoupling for the power supply pins. For optimum performance, these components should be located close to the TAA4100A and returned to their respective "ground" as shown in the Application/Test Circuit. Supply decoupling for the high current full-bridge supply pins. These components must be located as close to the power supply pins as possible to minimize output ringing which causes power supply overshoot. By reducing overshoot, these capacitors maximize the TAA4100A reliability. These capacitors should have good high frequency performance including low ESR and low ESL. Supply decoupling for the charge pump (high side gate drive supply) circuitry. These components must be located as close to the TAA4100A as possible. Output diode, which is used to minimize output overshoots/undershoots on the output nodes These devices clamp the output to the low impedance node formed by the close connection of CBR. Note the connection shown in the Application/Test Circuit. The "high side" diode protects the bottom side device from excessive BVDSS due to overshoots on the output node. The "bottom side" diode protects the top side device from excessive BVDSS due to undershoots on the output node. This device must be an ultra fast rectifier capable of sustaining the entire supply range and high peak currents. Zobel capacitor, which in conjunction with RZ, terminates the output filter at high frequencies. Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Zobel resistor, which in conjunction with CZ, terminates the output filter at high frequencies. The combination of RZ and CZ minimizes peaking of the output filter under both no load conditions or with real world loads, including loudspeakers, which usually exhibit a rising impedance with increasing frequency. Depending on the program material, the power rating of RZ may need to be adjusted. If the system requires full power operation at 20kHz then the power rating for RZ will likely need to be increased. Output inductor, which in conjunction with CO and CDO, demodulates (filters) the switching waveform into an audio signal. Forms a second order filter with a cutoff frequency of f C = 1 ( 2 L O C TOT ) and a quality factor of
CCP DO
CZ RZ
LO
Q = R L C TOT
CO CDO RFAULT DCP
2 L O C TOT where CTOT = CO || 2 * CDO.
Output capacitor, which, in conjunction with LO, demodulates (filters) the switching waveform into an audio signal. Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Differential Output Capacitor. Differential noise decoupling for reduction of conducted emissions. Must be located near chassis exit point for maximum effectiveness. Pull-up resistor for the open drain FAULT pin output. Recommended resistor value is 51k. Charge pump diodes. Used to generate floating supply for driving high side circuitry. Small signal diodes such as 1N4148 are recommended for these components.
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Typical Performance
THD+N versus Output Power
100 50 20 10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 1 2 5 10 W 20 50 100 RL = 2 RL = 4
%
VPP = 14.4V f = 1Khz BW = 22Hz - 20kHz(AES17)
100 VPP = 25V 50 RL = 4 20 f = 1Khz BW = 22Hz - 20kHz(AES17) 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 1 2 5
THD+N versus Output Power
10 W
20
50
100
200
+0 -10 -20 -30 -40 -50 d B -60 r -70 A -80 -90 -100 -110 -120 -130 60 100 200 19kHz, 20kHz 1:1 PO = 1W VPP = 25V RL = 4 32k FFT FS = 65kHz BW = <10Hz - 80kHz
Intermodulation Distortion
10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 PO = 1W VPP = 25V RL = 4
THD+N versus Frequency
BW = 30kHz BW = 22kHz
500
1k
2k
5k
10k
20k
30k
0.01
20
50
100
200
500 Hz
1k
2k
5k
10k
20k
100 90 80 70
Efficiency and Power Dissipation versus Total output Power
25
100 90
Efficiency and Power Dissipation versus Total output Power
100 90 80
20 Efficiency
80 70 Efficiency
70
Eff (%)
Eff (%)
Pdiss (W)
60 50 40 30 20 10 0 0 20 40 60 80 100 Total Output Power (W) 120 140
VPP = 14.4V RL = 4 f= 1kHz BW = 22Hz - 20kHz(AES17)
15
50 40 30 Power Dissipation
50 40 30
VPP = 25V RL = 4 f= 1kHz BW = 22Hz - 20kHz(AES17)
Power Dissipation
10
5
20 10
20 10 0
0 160
0 0 50 100 150 300 200 250 Total Output Power (W) 350 400 450
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Pdiss (W)
60
60
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Typical Performance (continued)
Efficiency and Power Dissipation versus Total output Power
100 50
THD+N versus Output Power
80 70
80 70
RL = 8 f = 1Khz 20 BW = 22Hz - 20kHz(AES17) 10
T
Efficiency 60 60 50 40 30 Power Dissipation
VPP = 14.4V RL = 2 f = 1kHz BW = 22Hz - 20kHz(AES17)
5 2
Eff (%)
Pdiss (W)
50 40 30 20 10 0 0 25 50 75 150 175 100 125 Total Output Power (W) 200 225 250
1 0.5 % 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 1 2 5 10 W 20 50 100 VPP = 25V VPP = 14.4V
20 10 0
+0 -10 -20 -30 -40 -50 d B -60 V -70 -80 -90 -100 -110 -120 20 50 100 200 VPP = 25V RL = 4 32k FFT FS = 65kHz BW = 22Hz - 20kHz(AES17)
Noise Floor
+0 -10 -20 -30 -40 d B r -50 A -60 -70 -80 -90
T T T T T T T
Channel Separation
VPP = 25V RL = 4 PO = 1W BW = 22Hz - 20kHz
500 Hz
1k
2k
5k
10k
20k
-100 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Output Power versus Supply Voltage
120 110 100 90
RL = 4 f = 1kHz BW= 22Hz - 20kHz(AES17)
Output Power versus Supply Voltage
90 80 70
RL = 2 f = 1kHz BW= 22Hz - 20kHz(AES17)
THD+N = SSW
THD+N = SSW
Output Power (W)
Output Power (W)
80 70 60 50 40 30 20 10 0 10 12 14 16 18 20
THD+N = 10%
60 50 40 30 20 10 0 10 11 12 13 14
THD+N = 10%
THD+N = 1%
THD+N = 1%
22
24
26
15
16
Supply Voltage (V)
Supply Voltage (V)
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Typical Performance AM Mode
THD+N versus Output Power
100 50 20 10 5 AM MODE RL = 4 f = 1Khz BW = 22Hz - 20kHz(AES17)
80 70 60
Efficiency and Power Dissipation versus Total output Power
60
Power Dissipation
45
Eff (%)
%
1 0.5 0.2 0.1 0.05 0.02 0.01 1 2 5 10 W 20 50 100 VPP = 16V
40 Efficiency 30
30
VPP = 14.4V
20 10 0 0 10 20
AM MODE VDD = 14.4V RL = 4 f = 1kHz BW = 22Hz - 20kHz(AES17)
15
0 80
30 40 50 Total Output Power (W)
60
70
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Pdiss (W)
2
50
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Application Information
G EN ERAL D E SCR I PTI ON The TAA4100A is a 4-channel BTL (Bridge Tied Load) output audio amplifier that operates on a single supply voltage ranging from 10-26V. The device is targeted specifically to meet the demands of OEM and aftermarket automobile in-dash head units. With a single supply voltage of 25V, the device delivers four 100 Watt (saturated square wave) channels into 4 ohm. Since the TAA4100A is a switching amplifier, the average dissipation at low to medium output power is far superior to best in class AB amplifiers specifically designed for in-dash head units. TA A4100A BA SIC AMPLIFIER OPERATION The TAA4100A has three major operational blocks: the signal processor, the MOSFET driver and the power MOSFETs. The signal processor is a 5V CMOS block that amplifies the audio input signal and converts the signal to a high frequency switching pattern. This switching pattern is spread spectrum in nature and has a typical idle switching frequency of about 650kHz. The MOSFET driver level shifts the processor's 5V switching pattern to the VPP power supply voltage and drives the power MOSFETs. The MOSFETs are N-channel devices configured as a full bridge to supply audio power to the load. The outputs of the power MOSFETs must be low pass filtered to remove the high frequency switching pattern leaving only the amplified audio signal. C IRCU IT BOARD LA YOU T The TAA4100A is a power (high current) amplifier that operates at relatively high switching frequencies. Therefore, amplifier outputs switch between the supply voltage and ground at high speeds while driving high currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage and below ground by the energy in the output inductance. To avoid subjecting the TAA4100A to potentially damaging voltage stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath's layout and application circuit be used for all applications and only be deviated from after careful analysis of the effects of any changes. Please refer to the TAA4100A evaluation board document, EB-TAA4100A, available on the Tripath website, at www.tripath.com. The following components are important to place near either their associated TAA4100A pins. The recommendations are ranked in order of layout importance, either for proper device operation or performance considerations. The capacitors, CBR, provide high frequency bypassing of the amplifier power supplies and will serve to reduce spikes and modulation of the power supply rails. Please note that bypassing requires a combination of capacitors for adequate stabilization. The output diodes, DO, are used to minimize overshoots/undershoots on the output node. Improper routing of these diodes will render them useless due to PCB trace inductance. Thus, these components must be located very close to the output pins with the "other side of the diode" routed directly to the appropriate VPP or PGND pin. The capacitors, CS, provide high frequency bypassing of the amplifier power supplies. Please note that bypassing requires a combination of capacitors for adequate stabilization.
-
-
TA A4100A GR OUND ING Proper grounding techniques are required to maximize TAA4100A functionality and performance. Parametric parameters such as THD+N, Noise Floor and Crosstalk can be adversely affected if proper
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grounding techniques are not implemented on the PCB layout. The following discussion highlights some recommendations about grounding both with respect to the TAA4100A as well as general "audio system" design rules. The TAA4100A is divided into two sections: the input section, which spans pins 1-11 and the output (high voltage) section, which spans pins 12 through pin 32. On the TAA4100A evaluation board, the ground is also divided into distinct sections, one for the input and one for the output. To minimize ground loops and keep the audio noise floor as low as possible, the input and output ground should be externally connected at a single point as close to the TAA4100A as possible. Additionally, any external input circuitry such as preamps, or active filters, should be referenced to pin 10. INPUT STAGE DESIGN The TAA4100A input stage is configured as an inverting amplifier that allows the system designer flexibility in setting the low frequency response. The gain is internally set at approximately 30dB with a typical input impedance of 50kohm. Please note that the input stage of the TAA4100A runs off of an internally regulated 5V supply. Thus, the input signal should not exceed 5Vpp (absolute maximum is 6Vpp). Due to the gain structure of the TAA4100A, it will likely be necessary to drive the input stage with more than 5Vpp to achieve the saturated sine wave output numbers shown in the typical characteristics. If this requirement is needed for a specific application, then the input pins (pins 1-4) should be schottky diode clamped between AGND (pin 10) and 5VGEN (pin 11). Suitable schottky diode arrays are available in small package footprints from multiple semiconductor companies. IN PUT CAPAC ITOR SELECTION CI and RIN (typically 50k) determine the input low-frequency pole. Typically this pole is set at 10Hz. CI is calculated according to: CI = 1 / (2 x FP x RI) where: RI = 50k FP = Input low frequency pole (typically less than 10Hz) AU TOMA TIC OU TPUT OFFSET VOLTA GE CORR EC TION The TAA4100A contains an automatic DC calibration routine that reduces the output offset voltage to a maximum of 25mV when the device is active (mute off). Please note that the DC calibration is done on the transition of MUTEB from low to high. The entire calibration sequence takes approximately 6mS after the MUTEB pin is pulled high. P O W ER SU P PL Y R EQ U IR E M ENT S The device is configured to operate from a single supply voltage of 10-26V. This allows the device to operate from an automobile battery under various conditions including: battery voltage with the engine off, alternator voltage with engine running and boosted voltage operation up to 26V using a DC-DC converter or voltage booster. The sleep pin must be driven from a microcontroller or external 3.3V or 5.0V power supply. A M MOD E The TAA4100A is typically configured as a high power, high efficiency, four channel switching amplifier. The TAA4100A also has an additional amplifier mode named "AM Mode." By pulling the AM pin to a logic
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high level, the TAA4100A is configured as a Class B amplifier as opposed to the normal, Class-T amplifier. AM mode significantly reduces EMI generation since the output amplifiers are now operated in linear mode. Operating in Class B mode also reduces the TAA4100A efficiency especially at low to medium output powers. Due to this increased power dissipation, it is recommended that the AM mode is used for applications such as AM radio playback where the average output level is minimal and a switching amplifier would most effect radio reception. The operating supply range is also limited to 10V-16V due to the increased power dissipation. A DC to DC converter that is used to step up the battery voltage for Class T operation (for instance 14.4V 20V or above) should be disabled before entering AM Mode. This will ensure that the supply voltage in AM Mode is limited to the battery voltage thereby minimizing the device power dissipation. To avoid possible damage to the output stage, appropriate sequencing must be adhered to when activating or disabling AM Mode. The TAA4100A MUST be muted (MUTEB = high) during logic changes of the AM pin. To change from Class-T mode to AM Mode, the following procedure must be followed. With AM = Low and MUTEB = High MUTEB = Low AM = High MUTEB = High
To change from AM Mode to Class-T mode, the following procedure must be followed. With AM = High, MUTEB = High MUTEB = Low AM = Low MUTEB = High
Thus, MUTEB is low during any transition of the AM pin. PROTEC TION C IRCU ITS The TAA4100A is guarded against over-current, over/under voltage, and over-temperature conditions. If the device goes into one of the various protection states, the FAULT pin goes to a logic HIGH state indicating a fault condition. When this occurs, all amplifier outputs are TRI-STATED and will float to VDD. OVER-CURR ENT PROTEC TION An over-current fault occurs if more than approximately 12.5 amps (typical) of current flows from any of the amplifier output pins. This can occur if the speaker wires are shorted together, if one side of the speaker is shorted to ground, or if an output is connected to VPP. An over-current fault sets an internal latch that automatically clears after a 600mS second delay. OVER AND UND ER VOLTA GE PROTECTION The over-voltage protection of theTAA4100A will be activated if the supply voltage is increased above 30.0 volts (typical) and 27.0 volts (minimum). This fault puts the amplifier into mute and resets automatically once the supply voltage is reduced below the hysteresis band (26.0 volts). The TAA4100A also has built-in load dump protection. This circuit puts the amplifier into sleep mode if the supply voltage is increased above 30V. The TAA4100A is able to survive power supply spikes to 60V if the duration is less than 50mS. The TAA4100A is also equipped with under voltage protection. This circuit is activated if the supply voltage goes below 8.1 volts (typical) and causes the output to mute. Increasing the supply voltage above the hysteresis band (typically 9.5V) will bring the amplifier out of mute mode.
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OVER- TEMPERATURE PROTECTION An over-temperature FAULT occurs if the junction temperature of the part exceeds 160C (typical). The thermal hysteresis is approximately 30C, therefore the fault will automatically clear when the junction temperature drops below 130C. SLEEP PIN (Active LOW) The SLEEPB (SLEEP) pin is a logic input that when pulled low puts the TAA4100A into a low quiescent current mode. This pin must be pulled up to an external 3.3V or 5V supply to activate (disable sleep mode) the TAA4100A. The sleep pin cannot be pulled up to VPP due to internal circuitry limitations. The amplifier takes approximately 500mS to come out of sleep. This period of time allows the input capacitor to charge fully assuming a value of 0.47uF. If the input capacitor size is increased, then additional time will be required to allow for the input capacitor to fully charge. To ensure that turn on is pop-free, the input capacitor must be fully charged before MUTEB is pulled high. M U T EB P IN The MUTEB pin is a logic input that mutes the TAA4100A. Pulling this pin low activates the mute circuitry. Pulling the pin high enables output switching and amplification. Please note that the input stage is still biased at approximately 2.5V, even when MUTEB pin is low. This keeps the BIASCAP, CB and input coupling capacitors, CI, completely charged. This allows for a clean transition from mute to on, and vice-versa, which eliminates turn-on/off pops. Please note that DC calibration is done every time MUTEB transitions from low to high. The DC calibration takes approximately 6mS. FA ULT PIN The FAULT pin is a logic output that indicates various fault conditions within the device. These conditions include: over-voltage, under-voltage, over-current at any output, low charge pump voltage, low 5V regulator voltage, and over-temperature (junction temperature greater than approximately 160C). The FAULT pin is an open drain output. The recommended pull-up to an external 3.3V or 5V supply is 51k. Alternatively, this pin can be pulled up to VPP through a 51k resistor. A logic high on this pin indicates a fault condition. This pin has a 1mA maximum sink current capability. H MUT EB PIN The HMUTEB pin is a logic output that indicates if the TAA4100A is muted. This mute state can be simply caused a low state on the MUTEB pin or by various fault conditions within the TAA4100A. A logic low on the HMUTEB pin indicates the TAA4100A is muted. TU RN-ON AND TURN-OFF N O ISE If turn-on or turn-off noise is present in a TAA4100A amplifier, the cause is frequently due to other circuitry external to the TAA4100A. The TAA4100A has extremely sophisticated turn on and off pop suppression circuitry that will eliminate "pops' in nearly all configurations. It is recommended that the MUTEB pin is pulled low during power-up and power-down of the VPP supply. In addition, MUTEB must be held low until the input capacitor is fully charged. Thus, a power on sequence as follows is recommended. First, power up the TAA4100A with SLEEPB and MUTEB low. Pull SLEEPB high and let input capacitor charge (minimum sleep time is about 500mS). Then, pull MUTEB high. On power off, MUTEB should be pulled low and then the power supply voltage removed. It is not necessary to activate SLEEPB on power down.
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Tri path Technol og y, I nc. - Techni cal I nformati on
OU T PU T FIL T ER D ESIGN One advantage of Tripath amplifiers over PWM solutions is the ability to use higher-cutoff-frequency filters. This means any load-dependent peaking/droop in the 20kHz audio band potentially caused by the filter can be made negligible. This is especially important for applications where the user may select a 4 or 8 speaker. Furthermore, speakers are not purely resistive loads and the impedance they present changes over frequency and from speaker model to speaker model. The core material of the output filter inductor has an effect on the distortion levels produced by a TAA4100A amplifier. Tripath recommends an output inductor capable of at least 9A before saturation. Recently, there have been a number of dual inductors designed specifically for bridged output switching amplifiers such as the TAA4100A. These dual inductors are two inductors shielded by a common ferrite shield. They may be manufactured as common mode chokes with the windings wound in the same direction or as differential mode chokes with the windings wound in opposite directions. Since the ferrite reduces the energy storage capability of the inductor, it is important to ensure that the shielded dual inductor does not saturate at the maximum currents attainable by the TAA4100A. Dual inductors wound as common mode inductors may aid in reducing common mode noise to the load. They also may result in lower than initial inductances due to electric field cancellation effects. Tripath also recommends that an RC damper be used after the LC low-pass filter. No-load operation of a TAA4100A amplifier can create significant peaking in the LC filter, which produces strong resonant currents that can overheat the integrated MOSFETs and/or other components. The RC dampens the peaking and prevents problems. It is highly recommended that the design process for a TAA4100A amplifier include an analysis of the interaction of intended speaker(s) with the LC filter and RC damper to ensure the desired frequency response is attained. Component values for the LC filter and RC damper may need to be altered from the Tripath suggestions to achieve the required response. PARALLELING TH E OUTPU T S The outputs of the TAA4100A can be paralleled to increase the current capability as compared to a single output. Each output must still have its own inductor. Thus, the device output pins cannot be directly connected. All 4 channels can be paralleled (after the inductors) or a pair of channels could be paralleled, for example CH1 and CH2 while using CH3 and CH4 a single bridged channels. To parallel, simply connect OUTxP to OUTyP of an adjacent channel, and OUTxN to OUTyN of an adjacent channel. Again, this connection needs to be after the output inductors (10uH in most cases). Paralleling 2 channels will allow 2 ohm operation across the entire supply range of 10-26V. Paralleling all 4 channels will allow 1 ohm operation across the entire supply range. Please note that the same input signal must be driven into each channel that is being paralleled. Also, individual input capacitors should still be used for each channel. PERFOR MANC E MEASUR EMENT S OF A TAA4 100A A MPL IF IER Tripath amplifiers operate by modulating the input signal with a high-frequency switching pattern. This signal is sent through a low-pass filter (external to the TAA4100A) that demodulates it to recover an amplified version of the audio input. The frequency of the switching pattern is spread spectrum and typically varies between 200kHz and 1.5MHz, which is well above the 20Hz - 22kHz audio band. The pattern itself does not alter or distort the audio input signal but it does introduce some inaudible noise components. The measurements of certain performance parameters, particularly those that have anything to do with noise, like THD+N, are significantly affected by the design of the low-pass filter used on the output of the
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Tri path Technol og y, I nc. - Techni cal I nformati on
TAA4100A and also the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just past the audio band or the bandwidth of the measurement instrument ends there, some of the inaudible noise components introduced by the Tripath amplifier switching pattern will get integrated into the measurement, degrading it. Tripath amplifiers do not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance measurements. Though using a multi-pole filter may remove high-frequency noise and improve THD+N type measurements (when they are made with widebandwidth measuring equipment), these same filters can increase distortion due to inductor non-linearity. Multi-pole filters require relatively large inductors, and inductor non-linearity increases with inductor value.
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Package Information
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Tri path Technol og y, I nc. - Techni cal I nformati on
Tripath Technology Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Tripath does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. Tripath and Digital Power Processing are trademarks of Tripath Technology Inc. Other trademarks referenced in this document are owned by their respective companies. TRIPATH'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THE PRESIDENT OF TRIPATH TECHNOLOGY INC. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in this labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Contact Information
TRIPATH TECHNOLOGY, INC 2560 Orchard Parkway, San Jose, CA 95131 408.750.3000 - P 408.750.3001 - F For more Sales Information, please visit us @ www.tripath.com/cont_s.htm For more Technical Information, please visit us @ www.tripath.com/data.htm
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